Excellent written and oral communication skills
Implement the video pre/post-processing algorithms using FPGAs tools and procedures
Define and coordinate interfaces within the system
Define TEST procedures for overall FPGA Design
Implement the video pre/post-processing algorithms using FPGAs tools and procedures
Define and coordinate interfaces within the system
Define TEST procedures for overall FPGA Design
Requirements:
lectrical Engineering Science degree (B.Sc.)
At least 5 years hands-on experience with FPGA design
Knowledge in SystemVerilog RTL coding
Familiar with scripts languages – PERL / Bash / Python / TCL
High motivation, be self-driven and be able to work as a Team player and also perform independent tasks
lectrical Engineering Science degree (B.Sc.)
At least 5 years hands-on experience with FPGA design
Knowledge in SystemVerilog RTL coding
Familiar with scripts languages – PERL / Bash / Python / TCL
High motivation, be self-driven and be able to work as a Team player and also perform independent tasks
This position is open to all candidates.
